3.3-V Clock Phase Lock-Loop Clock Driver (Rev. E)

3.3-V Clock Phase Lock-Loop Clock Driver (Rev. E)

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日期:2025-05-09
SCAS640E − JULY 2000 − REVISED MARCH 2005 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. 1Y[0−3] 2, 3, 5, 7 O Clock outputs. These outputs are low-skew copies of CLKIN. Each ......看更多