Testable Design for Adaptive Linear Equalizer in High-Speed Serial Links

Testable Design for Adaptive Linear Equalizer in High-Speed Serial Links

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日期:2025-06-03
Paper 33.3 INTERNATIONAL TEST CONFERENCE 6 where I’(k) is the channel input sequence, and n is a fixed, nonnegative integer which represents the equalization delay equal to the number of the precursor tap....看更多